The present invention relates to a semiconductor memory device; more particularly, to an internal voltage generator of the semiconductor device.
The semiconductor memory device is an apparatus for storing a plurality of data and reading the stored data. For efficient data storage and reading, the semiconductor memory device generates a variety of internal voltages for internal operations, using supply and ground voltages provided from an external device. Examples of internal voltages include a core voltage for a data storage area and a driving voltage for a peripheral area. The core voltage is used in the data storage area where a plurality of input data are stored. The driving voltage for the peripheral area is used for outputting data stored in the data storage area to an external device and providing the input data into the data storage area. There are additional internal voltages which are higher than the supply voltage or lower than the ground voltage by predetermined amounts. Those internal voltages are used to efficiently control MOS transistors in the data storage area. An internal voltage higher than the supply voltage is usually provided to gates of MOS transistors in the data storage area. An internal voltage lower than the ground voltage is usually provided as a bulk voltage of MOS transistors in the data storage area. The semiconductor memory device is provided with internal voltage generators to provide the variety of internal voltages.
To perform storage and read operations, the semiconductor memory device receives row and column addresses and other corresponding commands. The semiconductor memory device reads data located in the cell corresponding to the input address or stores input data in the cell corresponding to the address. While accessing data is performed after the row and column addresses are input, the semiconductor memory device is in an active state. While waiting for commands and corresponding addresses for the data access, the semiconductor memory device is in a standby state. In a standby state, circuits awaiting external commands and addresses operate minimally. The semiconductor memory device includes internal voltage generators respectively operating in the active mode and the standby mode to minimize power consumption for generating the internal voltages.
In the beginning, when the supply voltage is provided to the semiconductor memory device, it takes some time for a level of the supply voltage to reach a predetermined level. If the semiconductor memory device starts operating with a supply voltage which is lower than the predetermined level, malfunctions can be caused. Accordingly, the semiconductor memory device requires a circuit for sensing a level of ascent of the supply voltage until the supply voltage becomes higher than the predetermined level. Such a circuit is generally called a power up circuit. A sensing signal generated by the power up circuit is called a power up signal. An internal voltage generator in the semiconductor memory device generates the internal voltage for the internal operation in response to the power up signal.
With respect to a normal operation of the semiconductor memory device, it is important that the level of an internal voltage is maintained stably. As described above, an internal voltage generator in the semiconductor memory device generates an internal voltage for the internal operation in response to the power up signal. An internal voltage generator doesn't sense and maintain the level of its respective internal voltage after generating the internal voltage. Unless the level of the internal voltage is maintained to a predetermined level, malfunctions can be caused. Particularly, if the level of the internal voltage generated right after the power up signal is generated is changed, the semiconductor memory device may make an error in an initial operation.